Cadence Announces New Capabilities to Simplify and Accelerate PowerPC Design; Custom-Synthesized Design Approach Reduces Time to Market for PowerPC Designers
SAN JOSE, Calif.—(BUSINESS WIRE)—Sept. 26, 2005—
Cadence Design Systems, Inc. (NYSE:CDN) (Nasdaq:CDN)
today announced availability of a comprehensive set of services for
SoC designers embedding PowerPC cores, including silicon validation of
a new custom-synthesized design approach. The new approach results in
up to a 30 percent increase in processor speed and a 40 percent
reduction in chip area.
Developed in close collaboration with IBM, the custom-synthesized
approach provides a new schedule-performance tradeoff point for
performance-minded SoC designers embedding PowerPC cores. It advances
PowerPC portability in markets such as consumer and networking, where
processor speed and area results achievable with a full-synthesis
approach may fall short, yet the performance of a full-custom approach
is prohibited by time-to-market constraints.
"The Power architecture is critical to the computing and gaming
markets and is rapidly expanding into broader applications, including
emerging markets in SoC," said Tom Reeves, vice president of
Semiconductor Products and Solutions at IBM. "We expect this new
custom-synthesized approach from Cadence, coupled with their expertise
in design services, to help drive increased market adoption of the
Power Architecture."
Compared to a full-synthesis approach, the Cadence(R)
custom-synthesized approach achieves a 20 to 30 percent increase in
processor speed while reducing chip area by 40 percent. Cadence
Engineering Services achieves these results using Cadence's
Virtuoso(R) custom design platform to do full-custom design on the
eight to 10 design blocks that most affect timing, power and area,
such as the demanding CAMRAMs on the PowerPC 440 core. The remaining
blocks are designed using Cadence's RTL Compiler synthesis, which has
provided market-leading results for cycle time and chip real estate in
PowerPC applications.
"SoC designers select the PowerPC as their processor core for its
high performance, small core area and low power features. Now they can
have it ported to their choice of fab with no sacrifice in these
features," said Tim Henricks, vice president for Cadence Engineering
Services. "Through collaboration with IBM, we have developed PowerPC
porting capabilities superior to straight synthesis approaches that
provide the performance these designers demand."
The custom-synthesized approach for PowerPC designers was
validated in silicon by using a PowerPC 440 on the TSMC 130-LV
manufacturing process.
Cadence is taking a comprehensive approach to meeting the needs of
PowerPC designers. Because software development consumes the most
schedule time in complex SoCs with powerful microprocessors, Cadence
is offering co-verification services based on the Palladium(R)
emulation platform. This helps reduce time to market and schedule risk
at the system level by allowing design teams to develop software in
parallel with the SoC design.
"L-3 has experienced successful results running the IBM PowerPC
with Cadence's Palladium emulator," said Jim Grace, vice president of
business development, L-3 Communications, Interstate Electronics
Corporation. "We are looking forward to working with IBM and Cadence
as they continue developing preferred solutions for the PowerPC."
Cadence is a founding member of Power.org, an open standards
community that will help IC designers develop system-on-chips (SoCs)
using the IBM PowerPC Architecture. Power.org is dedicated to
promoting the IBM PowerPC Architecture as the preferred open-standard
hardware-development platform for electronic systems for markets such
as consumer electronics, networking, storage, military and automotive.
About Cadence
Cadence enables global electronic-design innovation and plays an
essential role in the creation of today's integrated circuits and
electronics. Customers use Cadence software and hardware,
methodologies, and services to design and verify advanced
semiconductors, printed circuit boards and systems used in consumer
electronics, networking and telecommunications equipment, and computer
systems. Cadence reported 2004 revenues of approximately $1.2 billion,
and has approximately 5,000 employees. The company is headquartered in
San Jose, Calif., with sales offices, design centers, and research
facilities around the world to serve the global electronics industry.
More information about the company, its products, and services is
available at www.cadence.com.
Cadence, Virtuoso, Palladium and the Cadence logo are registered
trademarks of Cadence Design Systems in the United States and other
countries. All other trademarks are the property of their respective
owners.
Contact:
Cadence Design Systems, Inc.
Doron Aronson, 408-428-4404
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